Product Summary

The ISP1161A1BD is a single-chip universal serial bus host controller and device controller. The IISP1161A1BD provides two downstream ports for the USB HC and one upstream port for the USB DC. Each downstream port has an overcurrent (OC) detection input pin and power supply switching control output pin. The upstream port has a VBUS detection input pin.The ISP1161A1 also provides separate wake-up input pins and suspended status output pins for the USB HC and the USB DC, respectively. This makes power management flexible. The downstream ports for the HC can be connected with any USB compliant devices and hubs that have USB upstream ports. The upstream port for the ISP1161A1BD can be connected to any USB compliant USB host and USB hubs that have USB downstream ports. The ISP1161A1BD is compliant with most USB device class specifications such as Imaging Class, Mass Storage Devices, Communication Devices, Printing Devices and Human Interface Devices.

Parametrics

ISP1161A1BD absolute maximum ratings: (1) VCC(5V) supply voltage on pin VCC: -0.5, +6.0 V; (2) VCC(3.3V) supply voltage on pin Vreg(3.3): -0.5 +4.6 V; (3) VI input voltage: -0.5 +6.0 V; (4) Ilu latch-up current VI < 0 or VI > VCC: 100 mA; (5) Vesd electrostatic discharge voltage ILI < 1 mA [1]: -2000 +2000 V; (6) Tstg storage temperature -60 +150 °C.

Features

ISP1161A1BD features: (1)Complies with Universal Serial Bus Specication Rev. 2.0; (2)The Host Controller portion of the ISP1161A1 supports data transfer at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s); (3)The Device Controller portion of the ISP1161A1 supports data transfer at full-speed (12 Mbit/s); (4)Combines the HC and the DC in a single chip; (5)On-chip DC complies with most USB device class specications; (6)Both the HC and the DC can be accessed by an external microprocessor via separate I/O port addresses; (7)Selectable one or two downstream ports for the HC and one upstream port for the DC; (8)Up to 14 programmable USB endpoints with 2 ?xed control IN/OUT endpoints for the DC; (9)Built-in separate FIFO buffer RAM for the HC (4 kbytes) and DC (2462 bytes); (10)Endpoints with double buffering to increase throughput and ease real-time data transfer for both DC transfers and HC isochronous (ISO) transactions; (11)6 MHz crystal oscillator with integrated PLL for low EMI.

Diagrams

 ISP1161A1BD pin connnection

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
ISP1161A1BD
ISP1161A1BD


IC USB HOST/DEVICE CTRLR 64-LQFP

Data Sheet

Negotiable 
ISP1161A1BD,118
ISP1161A1BD,118

NXP Semiconductors

USB Interface IC USB1.1 HOST &DEVICE

Data Sheet

Negotiable 
ISP1161A1BD,151
ISP1161A1BD,151

NXP Semiconductors

USB Interface IC USB1.1 HOST &DEVICE

Data Sheet

Negotiable 
ISP1161A1BD-T
ISP1161A1BD-T

NXP Semiconductors

USB Interface IC USB1.1 HOST &DEVICE CONTROLLER

Data Sheet

Negotiable 
ISP1161A1BD-S
ISP1161A1BD-S

NXP Semiconductors

USB Interface IC USB1.1 HOST &DEVICE CONTROLLER

Data Sheet

Negotiable 
ISP1161A1BDFA
ISP1161A1BDFA


IC USB HOST CONTROLLER 64LQFP

Data Sheet

Negotiable 
ISP1161A1BDTM
ISP1161A1BDTM


IC USB HOST CONTROLLER 64LQFP

Data Sheet

Negotiable